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mini-UART
- URAT资料，用verilog HDL编写，具有完整的信号描述和功能-URAT data write complete signal descr iption and function, with verilog HDL
UART
- verilog写的串口程序，其功能完全最正确，带工程文件-verilog to write the serial program, its function is completely the right, with the project file
UART
- verilog实现UART，分模块实现，希望对大家有所帮助-verilog-- UART
uart
- verilog uart串口通讯程序设计 带个模块详细设计 及说明文档-Verilog the uart serial communication program design with the detailed design and documentation of a module
FPGA--uart(verilog)
- verilog uart 源码，编译器ISE9.1i版本，很有用的源码-verilog uart code
UART
- 基于ISE 用verilog编写的uart串口通信源码-Based on the ISE written in verilog uart serial communication source code
uart
- FPGA上的verilog 的uart实现方法-FPGA on the verilog uart implementation
UART-by-Verilog
- 用Verilog实现UART，并且附有详细说明那个-The Verilog UART, and with the detailed descr iption that
verilog-uart-rs232
- verilog HDL 描写的uart程序 由PC端接收然后+1返回 等等 东南大学09级4系综合课程设计-verilog HDL descr iption uart program Received by the PC side and then+1 back。 SEU..
verilog-uart
- UART（Universal Asynchronous Receiver Transmitter，通用异步收发器）是广泛使用的异步串行数据通信协议。下面首先介绍UART硬件接口及电平转换电路，分析UART的传输时序并利用Verilog HDL语言进行建模与仿真，最后通过开发板与PC相连进行RS-232通信来测试UART收发器的正确性。-UART (Universal Asynchronous Receiver Transmitter, Universal Asynchronous Receive
UART
- 用verilog编写的UART串口通信程序，经验证误码率为0，系统由ARM控制FPGA的串口进行通信；-Written in verilog UART serial communication procedures, proven error rate is 0, the system controlled by ARM FPGA serial communication
UART
- FPGA Verilog UART 通信源代码-FPGA Verilog THIS IS A UART SQC
uart transmission rtl level
- UART transmission rtl level
verilog--uart--fpga
- 基于verilog的串口通信实验指导和源程序-Verilog based serial communication experiment guide and source code
uart验证
- uart验证，已测试，各位可以放心使用哦，verilog语言编写的
Uart
- FPGA verilog UART串口通信,可通过RS232串口与串口助手通信。-FPGA verilog UART communication, it could connect with UART assistor with RS232 port.
UART(Verilog)
- Verilog 串口程序，可完成完整的数据接收与发送。代码注释清晰，程序易读。-Verilog UART
uart
- 串口verilog源代码 uart code verilog-uart code verilog
verilog-uart-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
uart_test
- 基于FPGA 的sparten-6 AX-309片内串口uart通信例子(FPGA sparten-6 AX-309 uart connection example)